BUF_WR_READY_SIGNAL_EN=Val_0x0, INT_B_SIGNAL_EN=Val_0x0, DMA_INTERRUPT_SIGNAL_EN=Val_0x0, BGAP_EVENT_SIGNAL_EN=Val_0x0, CARD_REMOVAL_SIGNAL_EN=Val_0x0, CARD_INSERTION_SIGNAL_EN=Val_0x0, CMD_COMPLETE_SIGNAL_EN=Val_0x0, INT_C_SIGNAL_EN=Val_0x0, XFER_COMPLETE_SIGNAL_EN=Val_0x0, BUF_RD_READY_SIGNAL_EN=Val_0x0, CARD_INTERRUPT_SIGNAL_EN=Val_0x0, FX_EVENT_SIGNAL_EN=Val_0x0, INT_A_SIGNAL_EN=Val_0x0
Normal Interrupt Signal Enable Register
| CMD_COMPLETE_SIGNAL_EN | Command Complete Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| XFER_COMPLETE_SIGNAL_EN | Transfer Complete Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| BGAP_EVENT_SIGNAL_EN | Block Gap Event Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| DMA_INTERRUPT_SIGNAL_EN | DMA Interrupt Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| BUF_WR_READY_SIGNAL_EN | Buffer Write Ready Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| BUF_RD_READY_SIGNAL_EN | Buffer Read Ready Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| CARD_INSERTION_SIGNAL_EN | Card Insertion Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| CARD_REMOVAL_SIGNAL_EN | Card Removal Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| CARD_INTERRUPT_SIGNAL_EN | Card Interrupt Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| INT_A_SIGNAL_EN | INT_A (Embedded) Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| INT_B_SIGNAL_EN | INT_B (Embedded) Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| INT_C_SIGNAL_EN | INT_C (Embedded) Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |
| FX_EVENT_SIGNAL_EN | FX Event Signal Enable. 0 (Val_0x0): Masked 1 (Val_0x1): Enabled |